Browsing by Author "Bhukya, M"

Now showing 1 - 5 of 5
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    Design and Performance Analysis of ISFET using various Oxide Materials for Biosensing Applications
    (2024) Majji, S; Dash, C; Rani, D; Bhukya, M; Panigrahy, A
    The healthcare industry is always changing because of technological breakthroughs that spur new methods of diagnosing and treating illnesses. This study investigates the development of Ion Sensitive Field Effect Transistor (ISFET) sensors for DNA based blood cancer diagnosis. This work presents the design of a two-dimensional ion-sensitive field-effect transistor. Concentration fluctuations and transfer characteristics with different oxides are studied using blood from two electrolyte solutions. It is possible to evaluate how the modeled device can be utilized as a pH sensor or a biosensor in healthcare applications by looking at how the pH changes for different oxides. Additionally, several oxides were examined in the simulated ISFET devices' output characteristics. Blood is used as the electrolyte to study the device's sensitivity for different oxides. When pH 7.4 is considered, SiO2 oxide is significantly more sensitive than other oxides. The resulting 2D-ISFET exhibits remarkable blood electrolyte sensitivity and holds potential as a quick detection tool for blood cancer. The results show that the ISFET possesses drain-induced barrier lowering (DIBL), greater ON-current (ION) and switching ratio (ION/IOFF), and decreased subthreshold swing (SS). The pH sensor's sensitivity and the suggested equipment can detect up to 30 fg/mL of blood cancer biomarkers. An important development in technology-driven healthcare is the emergence of DNA-based blood cancer detection utilizing ISFET sensors. This opens up new avenues for improving cancer diagnosis and patient outcomes.
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    An Effective Design and Implementation of Hybrid MPP Tracking Scheme based on Linear Tangents & Neville Interpolation (LT-NI) Technique for Photovoltaic (PV) System
    (2017) Bhukya, M; Kota, V
    Solar power is free from environmental pollution and also offers economic benefits to the investors. In order to optimize at most solar power, tracking schemes are employed and traditional schemes from the family of perturbation suffer from slow response, due to specific step size disruption and oscillations around operating point. Therefore, this paper proposes an effective design and implementation of a hybrid Maximum Power Point Tracking (MPPT) scheme based on Linear Tangents - Neville Interpolation (LT-NI) techniques. Two tangents are drawn on the P-V characteristics at 75% and 90% of open circuit voltage (VOC).The chosen two tangents intersect and gives rise to a third voltage (N) point. In continuation, the three voltage points (0.75VOC, N & 0.9VOC) are computed using Neville Interpolation. The performance of the proposed LT-NI scheme is compared with Perturb & Observe (P&O) and advanced Divide and Conquer (DC) algorithms.
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    Performance Improvement of Spacer engineered N-type Tree Shaped NSFET towards Advanced Technology nodes
    (2024) Gowthami, U; Panigrahy, A; Rani, D; Bhukya, M; Sreenivasulu, V
    Tree-shaped Nanosheet FETS (NSFET) is the most dependable way to scale down the gate lengths deep. This paper investigates the 12nm gate length (LG) n-type Tree-shaped NSFET with the gate having a stack of high-k dielectric (HfO2) and SiO2 using different spacer materials, which can be done using TCAD simulations. The Tree-shaped NFET device with T(NS) = 5 nm, W(NS) = 25 nm, WIB = 5 nm, and HIB = 25 nm has high on-current (ION) and low off-current (IOFF). The 3D device with single-k and dual-k spacers are compared and its DC characteristics are shown. It is noted that the dual-k device achieves the maximum ION/IOFF ratio, which is 109 , compared to 107 because the fringing fields with spacer dielectric lengthen the effective gate length. Additionally, the impact of work function, interbridge height, width, gate lengths, and temperature, along with the device's analog/RF and DC metrics, is also investigated in this paper. Even at 12 nm LG, the proposed device exhibits good electrical properties with DIBL = 23 mV/V and SS = 62 mV/dec and switching ratio (ION/IOFF) = 109 . The device's performance confirms that Moore's law holds even for lower technology nodes, allowing for further scalability.
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    Renewable Energy: Potential, Status, Targets and Challenges in Rajasthan
    (2020) Bhukya, M; Kumar, M; Kant, A; Punit
    India has a population of 1.3 billion people and one of largest growing economies in the world. Therefore, there is a strong demand of energy. Till date, the main source of energy is coal which is non renewable and harmful to the environment. Therefore, it is important and necessary to find an alternative source of energy. This indirectly drives us to focus on Renewable Energy Source, which has several advantages. The Ministry of National Renewable Energy (MNRE) has launched many schemes to encourage the domestic and commercial sector to use renewable energy sources. In India the state of Rajasthan is occupying 5th position in the production of electric power generation from Renewable Energy Sources like Solar, Wind and Biomass etc. Therefore this paper discusses the potential and opportunities of electric power generation through renewable energy in the state of Rajasthan.
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    Spacer Dielectric Analysis of Multi-Channel Nanosheet FET for Nanoscale Applications
    (2024) Panigrahy, A; Amudalapalli, V; Rani, D; Bhukya, M
    This work investigates the effect of single and dual-k spacer materials consisting of different dielectric constants (k) in optimized nano-channel gate-stack nanosheet (NS-FET) employing hafnium oxide and silicon dioxide as gate insulator to improve its sub-threshold performance. The effect of the external low k spacer modification in the dual-k spacer has been shown by adjusting the inner high-k spacer. The drain induced barrier lowering (DIBL) in this modification with dual-k spacer is 14 mV/V, which is a significant improvement above single spacer NS-FET. The Visual TCAD 3D Cogenda tool is used to examine the performance of the developed NS-FET with air, single, dual-k, and hybrid spacers. The CADENCE platform is used to perform circuit aspects. Additionally, a comparison of the device architecture's performance study with respect to DC characteristics is made. DC parameters of the proposed device are established: ION to IOFF ratio of approximately 105 , DIBL of approximately 14 mV/V, sub-threshold swing (SS) of approximately 62 mV/dec, and low threshold voltage (Vth) of 0.38 V. The analysis on power consumption for advanced NS FET is also analyzed with single-k and dual-k spacers. The performance of single-k and dual-k spacer dielectric variation for CMOS inverter is also shown. Furthermore, low power consumption by this NS-FET ensures improved device performance suitable for nanoscale semiconductor industries.